The HBM4E Controller IP from Rambus provides high-bandwidth memory support for AI accelerators and high-performance computing workloads. This controller achieves 16 Gbps per pin, resulting in 4.1 TB/s of throughput per memory stack.
In configurations with eight HBM4E devices, the architecture facilitates a total memory bandwidth exceeding 32 TB/s. Engineered for 2.5D and 3D integration, the IP pairs with third-party PHYs for use in AI SoCs and custom base dies. It emphasizes low latency and reliability, drawing on a legacy of over 100 HBM design wins to mitigate silicon risk. The solution is now available for licensing and early access design engagement for next-generation hardware development.